VLSI CAD Engineer – SoC IP Enablement & Front-End TFM (3–6 Years Experience)

Location: Bangalore (Onsite)

Job Summary

We are looking for a highly motivated and technically strong VLSI CAD Engineer with 3–6 years of industry experience in Foundation & complex third-party IP enablement, IP collateral management & PPA studies, EDA flow support related to SOC front-end design. The ideal candidate will work closely with SoC design, CAD-Infra, methodology, and EDA vendors to enable robust and scalable IP interface and design flows across multiple projects.

This role requires strong understanding of Foundation and Complex IP components, enablement and integration challenges at different technology nodes, hands-on experience with front-end EDA tools, ability to manage IP collateral, and overall design environment deployment.