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⏰ Full-time

UVM Verification Engineer, Principal Engineer

Synopsys, Inc.
Location 📍 ottawa, Canada
Posted 📅 June 10, 2026
Work Type ⏰ Full-time

Position Overview

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly skilled and motivated verification engineer with a deep passion for technology and innovation. You thrive in fast-paced, collaborative environments and are excited to solve the toughest challenges in silicon design. With a strong background in SystemVerilog and UVM, you bring proven experience developing robust, scalable verification environments for complex digital systems. You are adept at understanding and interpreting technical specifications, and you excel in creating comprehensive testplans and function...

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Job Details

Employment Type
Full-time
📊
Category
Engineering
🏠
Work Arrangement
On-site
📍
Location
ottawa, Canada