TPU RTL Design Engineer

_corporate_fare_ Google _place_ Sunnyvale, CA, USA

**Mid**

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
+ 2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development.
+ Experience with digital clock control circuits, including clock dividers, glitch-free muxes, and clock gating.
+ Experience in SystemVerilog for creating microarchitecture specifications and synthesizable RTL.
+ Experience using Python, Tcl, or Perl for automating design tasks and data analysis.

**Preferred qualifications:**

+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer...