We are seeking an experienced engineer focused on Fabric and Memory Subsystem microarchitecture and RTL for high-performance SOCs. In this role, you will work on a server-class SoC fabric that supports cutting-edge data center designs.

This role is hybrid, based out of Toronto (ON), Ottawa (ON), Boston (MA), or Austin (TX).

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Responsibilities:

• Design and develop the Fabric and Memory subsystems from scratch for a high-performance CPU, working closely with the DV, physical design, and architecture teams.
• Create RTL implementations in Verilog using both industry-standard tools and open-source infrastructure.
• Collaborate with cross-functional teams, including design, test, and post-silic...