Position Overview
Responsibilities:
Take ownership of designing and implementing SDC for complex SoC architectures. Collaborate with customers to perform timing analysis and ensure design meets their requirements and specifications. Assume responsibility for planning low-power structures and reviewing the flow, including CPF/UPF (Common Power Format/Unified Power Format). Provide support to the backend team in post-layout timing closures, ensuring the design meets timing constraints and performance goals. Assist the project team in central tech-library management, ensuring that the design IP is effectively organized, documented, and accessible. Utilize EDA (Electronic Design Automation) tools and in-house design kits to perform design tasks efficiently. Requirements:
Strong familiarity with ASIC (Application-Specific Integrated Circuit) flow and experience working in a similar role. Thorough understanding of SoC IO (Input/O...