SoC Silicon Top-Level Floorplan Engineer

_corporate_fare_ Google _place_ Sunnyvale, CA, USA

**Advanced**

Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 10 years of experience in physical design (e.g., with a focus on floorplanning, integration, or top-level chip assembly).
+ Experience in 3D Integrated Circuit (3D IC) design (e.g., multi-die partitioning, TSV planning, advanced chiplet and packaging technologies, optimizing PPA, and physical verification in a SiP context).
+ Experience in physical design working on advanced nodes.
+ Experience collaborating with cross-functional teams (e.g., architecture, RTL design, synthesis, verification).

**Preferred qualifications...