SerDes Architect and Design Engineer

Responsibilities

• Correlate silicon measurements with simulated data, and lead performance optimization in the system environment
• Define architecture, specifications, and circuit topologies for next-generation SerDes
• Design high-performance analog/mixed-signal circuits in advanced node technologies
• Develop and oversee the design of critical blocks including RX/TX equalization (CTLE, DFE), high-speed PLLs, phase interpolators, DLLs, TDCs
• Implement digitally assisted analog circuits, background calibration, and adaptive loops to improve power, performance, and area
• Lead lab validation, debugging and characterization of SerDes IPs within our state-of-the-art lab
• Oversee physical layout to minimize parasitics, device stress, electromigration and process variation impacts
• Oversee development of system‑level modeling, with behavioral models (e.g., MATLAB, ...