Lead innovative memory IP verification as a Senior UVM Verification Expert at Synopsys. Utilize SystemVerilog to create high-performance environments and contribute to vital methodologies.

In this Senior Staff position, you will play a critical role in developing comprehensive test plans while analyzing complex digital systems. Your mentorship will empower team growth, and your collaboration will promote clarity across various projects. By enhancing verification methodologies, you will directly contribute to improving product delivery and advancing Synopsys' reputation in the IP market.

Key Responsibilities:
• Create detailed functional coverage models for memory IP
• Design test cases to verify RTL PHY functionality
• Collaborate in technical reviews with architecture teams
• Resolve abstract verification challenges using advanced techniques
• Integrate virtual prototyping technologies to enhance processes

Requiremen...