Senior/ Staff STA Engineer

Job Description

**Senior/Staff STA (Static Timing Analysis) Engineer**

The STA Engineer is responsible for ensuring robust timing closure and signoff readiness for block- and full-chip designs across all modes and corners. This role owns timing constraint development and validation, performs detailed setup/hold and variation-aware analysis, and partners closely with Synthesis, CTS, Physical Design, and Design teams to debug violations and drive ECO-based optimizations through tapeout.

What you’ll do

+ Perform full-chip and block-level Static Timing Analysis (STA) across all modes and corners.

+ Analyze and debug setup, hold, recovery, removal, clock gating, and signal integrity-related timing violations.

+ Work closely with Physical Design, Synthesis, CTS, and Design teams to achieve timing closure.

+ Develop and maintain timing constraints including SDC creation, validation, and signoff...