Position Overview
Job Description
- Develop and verify mixed-signal models for digital multiphase voltage regulators.
- Design SystemVerilog/Verilog testbenches, checkers, and verification flows for system-level control features.
- Model and simulate regulator behavior in steady-state, transient, fault, and configuration scenarios.
- Verify PWM modulation, phase management, current sensing, telemetry, protection, and control-loop interactions.
- Work collaboratively with analog, digital, firmware, validation, and system architecture teams.
- Debug model, RTL, firmware, and mixed-signal behavior, contributing to system-level verification enhancements.
- Extensive background in mixed-signal or digital verification with SystemVerilog/Verilog expertise.
- Demonstrated capability to model, verify, and debug complex analog/digital/firmware interactions.
- Experience with behavioral models, testbenches, assertions, checkers, coverage, or UVM-based ...