The Digital IP (DIP) group at NVIDIA is an organization of circuit design and CAD engineers that creates a wide variety of IP for the chips NVIDIA designs. This group works closely with internal SOC design, silicon testing, and productization teams that turn our IP into products that change the world. One of the roles fulfilled by the DIP group is to develop sophisticated SRAM compilers that are used extensively by our SOC design partners. We are looking to hire a skilled and creative SRAM circuit designer to help achieve these goals in a high-visibility position.

What you'll be doing:

• Embedded SRAM design: Transistor-level circuit design, supervising layout implementation, physical and logical verification, and debug of SRAM macros.

• SRAM compiler development: Envisioning, defining, and coding more efficient ways to automate the simultaneous assembly and validation of multiple unique SRAM macros using NVIDIA's extensive compute resourc...