Position Overview
- Design and implement RTL using Verilog and SystemVerilog for complex FPGA systems
- Translate high-level requirements into detailed architecture and design specifications
- Execute full FPGA design flow including synthesis, place and route, and timing closure
- Develop and optimize designs for high-speed, high-performance applications
- Work across multiple clock domains including asynchronous CDC handling
- Collaborate with verification teams to ensure functional correctness and coverage
- Debug and resolve design, timing, and hardware issues at block and system levels
- Support hardware bring-up, lab validation, and system integration activities
- Utilize FPGA toolchains such as Xilinx Vivado or Intel Quartus
- Implement and integrate high-speed interfaces such as PCIe, Ethernet, DDR, SPI, and I2C
- Perform timing analysis, constraint development, and design optimization
- Work closely with hardwa...