• Develop and execute verification plans for USB IP/Controller designs.
• Build and maintain SystemVerilog/UVM-based verification environments.
• Develop testbenches, sequences, drivers, monitors, and scoreboards.
• Create directed and constrained random test cases to verify USB functionality.
• Perform functional coverage analysis and regression testing to ensure verification completeness.
• Debug and analyze failures, identify root causes, and work closely with design teams to resolve issues.
• Verify compliance with USB protocol specifications (USB 2.0 / USB 3.x).

Job Requirements

• Bachelor’s or Master’s degree in Electronics / Electrical Engineering / Microelectronics / VLSI.
• Strong understanding of digital design and verification concepts.
• Experience with SystemVerilog and UVM methodology.
• Good understanding of USB protocol (USB 2.0 / USB 3.0 / USB 3.1).
• Experien...