A leading technology company in Cambridge seeks a Staff RTL Design Engineer to drive innovation in CPU core design based on RISC-V architecture. You will be involved in designing, implementing features, and collaborating with various teams to optimize performance. The ideal candidate has over 5 years of experience in CPU RTL design and proficiency in Verilog or System Verilog. This role requires teamwork and high-quality design focus, making it a great opportunity for passionate engineers.
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