Drive end‑to‑end PCIe validation, ensuring high‑performance, standards compliance (PCIe Gen3/Gen4/Gen5 where applicable), and robust interoperability across a wide ecosystem
Work cross‑functionally with architecture, design, firmware, PHY, and system teams to define validation strategies, root‑cause complex issues, and deliver high‑quality silicon to production
Own PCIe validation strategy and execution for the Storage Accelerator products across pre‑silicon and post‑silicon phases
Define coverage plans including protocol, link, PHY, power management, and compliance scenarios
Lead PCIe link bring‑up, training, and tuning across multiple generations (Gen3/4/5/6)
Perform deep debug using protocol analyzers, oscilloscopes, and logic analyzers
Drive PCI‑SIG compliance testing including electrical and protocol validation
Ensure interoperability with server CPUs from leading manuf...