AWS's Trainium and Inferentia chips power the world's largest machine learning clusters. Our team builds C++ models of these custom SoCs that RTL designers, verification engineers, and software teams depend on throughout the silicon development lifecycle. We're looking for a modeling engineer to build and own models that directly impact how our chips are designed, verified, and brought to production.

What you'll do:

- Build and own models of SoC subsystems — translating architecture specs and RTL behavior into accurate, testable C++ models
- Work directly with RTL design and verification teams to validate model behavior against RTL, debug discrepancies, and support pre-silicon verification flows
- Develop model-based test infrastructure: regression suites, RTL correlation checks, and coverage-driven testing
- Contribute to performance modeling efforts — building cycle-approximate models that help architects evaluate design trade-offs before RTL exists
...