The Silicon Platform Team acts as the core R&D middleware group for chip development within the company. The team covers the full spectrum of the chip design flow, including Logic Synthesis, Design for Testability (DFT), Backend Design, Physical and STA (Static Timing Analysis) Signoff, as well as Power Integrity, IR drop, and Electromagnetic Compatibility (Power/IR/EM). The team also oversees tape‑out, mass production, packaging, testing, and board‑level verification. They collaborate closely with front‑end chip teams across business units to drive R&D progress and mass production deployment for chip.

• Provide chip packaging design solutions, including packaging selection, packaging design, packaging implementation, PinMap definition, and board‑level interconnection.
• Interface with chip designers and board‑level designers to handle interface‑related issues.
• Responsible for signal integrity (SI) and ...