Location;
Bangalore / Noida

Role;
Layout Engineer

Responsibilities:

• Implementation of quality full-custom layouts of high-performance arrays and memory blocks from supplied schematics: from planning stages through final layout verification and review, in accordance with strict guidelines for performance and manufacturability.
• Must have experience with Cadence Virtuoso layout systems.
• Resource for interpretation and implementation of all physical design rules in the most advanced manufacturing processes used by ARM.
• Custom layout and verification of complex memory cells.
• Expert physical design verification (DRC/LVS/DFM) resource for all types of circuit and test layouts using Calibre verification tools.

Required Skills and Experience :

• The ideal candidate is expected to have 3+ years pertinent...