Job Summary:

We are seeking a highly experienced Lead PD Engineer for AI NPU to lead and contribute to the physical design and implementation of complex, high-performance semiconductor integrated circuits. The individual is responsible from RTL synthesis, Floor planning, Placement, CTS, Routing, Timing convergence (STA). The individual contributes to problem solving related to physical design. Contributes to define best Physical design strategy per technology node.

Job Responsibilities

* Execute physical design activities including floorplanning, power planning, place and route, clock tree synthesis, and static timing analysis (STA).

* Collaborate with physical verification (DRC, LVS, Antenna) and resolve related issues.

* Collaborate with power integrity analysis (IR drop, EM) and optimize designs for power efficiency.

* Collaborate with design, verification, and DFT teams to ensure seamless integration and ach...