Responsibility

1. Responsible for layout planning and design of analog and mixed-signal circuit modules; 2. Independently perform DRC, LVS, ERC, and other layout verification tasks; 3. Work closely with analog circuit design engineers to ensure effective communication and layout optimization; 4. Prepare and maintain relevant technical documentation.

Requirement

1. Bachelor’s degree or above, with relevant experience in IC layout design;

2. Proficient in Linux systems and skilled in using verification tools such as Cadence and Calibre;

3. Experience with 8nm or smaller process nodes is preferred;

4. Experience in SRAM layout design is a plus;

5. Strong communication and teamwork skills.