Integrated Circuit Package Design Engineer

_corporate_fare_ Google _place_ Sunnyvale, CA, USA

**Mid**

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

**Minimum qualifications:**

+ Bachelor's degree in Mechanical Engineering, Material Engineering, Electrical Engineering, Technology, Science, a related field, or equivalent practical experience.
+ 4 years of experience in chip package design/layout using Cadence allegro package designer (APD) or Mentor Expedition.
+ Experience in chip package substrate layout, optimization, design verification, design for manufacturability (DFM) and taping out for production.
+ Experience in design automation and scripting.

**Preferred qualifications:**

+ Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
+ Experience in work...