Hi All,

I have an immediate requirements for Asic SOC verification Engineers for HYD Location.

Exp - 8+ and 12+ yrs
Location - HYD
Notice Period - Immediate to 30 days.

JD:
10+ years of experience in SOC verification and UVM environment development with ARM Processor ( U 85/ U 65/ M55 );
Proficient in test plan definition and testcase development in C/Assembly/SystemVerilog;
Expertise in verifying design at RTL level and gate-level simulation;
Good understanding of coverage analysis, performance verification and use-case verification;
Experience in functional test vector development and post-silicon bring-up/debug;
Fluency with scripting languages (e.g., Perl, Python, Shell); and
Preferred: knowledge of Power Aware verification is a plus.

Interested candidates, Kindly share with me your updated profile to [email protected] or call me 9900927620 for detailed Discussion.