Hi,

We have an opening for RISC V/ARM Verification engineer and Lead role with SV, UVM, Verilog.

• Should have hands on verification experience on processor based system, preferably RISC-V/ARM based verification experience.
• Understanding of RISC-V/ARM architecture
• Must have worked on multiple project on SV-UVM based methodology
• Scripting experience is an added advantage
• Strong analytical and problem solving skills
• Understanding of FPGA flow is an added advantage

Please share your resume to [email protected]

Regards,

Jaya