Job DescriptionJob Description
As a member of DFT engineering team, the candidate will develop methodologies and implement DFT for pre/post-silicon DFT flow and contribute to SOC/Automotive/RISC-V product test quality.
Work with senior engineers across disciplines (DE, IMP, PE, TE) to meet low cost and high quality DFT deliverables.
RequirementRequirement:
(Exp.- 7-12 Years)
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Detailed knowledge of Design for Testability and IC Design Flow.
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Hands-on experience in post-silicon debug, ATE bring-up, low-power DFT methodologies, DFT architecture and sound understanding of DFT clocking strategies
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Experience with tools (Synopsys/Siemens) and methodologies for DFT
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Experience with Automotive Low DPPM DFT / LBIST /IST
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Hierarchical DFT, LBIST, MBIST, Diagnosis flows
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Strong DFT SCAN implementation skills, top DFT architecture , SCAN STA / SDC handling , DFT timing closure
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Strong ATPG verification background, cover...