Job Description:

Arm’s Solutions group DFT team implements DFT for test-chips and hard-macros to prove Arm's soft IP power, performance, area, and functionality within the context of a SoC using the latest DFT techniques and process technologies. We closely collaborate with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE.

Responsibilities:

Architect, Implement, and validate innovative DFT techniques on test-chips and hard-macros. Insert DFT logic into SoC-style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE-targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and ...