Job Description:

• Responsible for implementing the hardware Memory BIST (MBIST) features that support ATE, in-system test, debug and diagnostics needs of the memories in design.
• Work closely with the design, design-verification, and backend teams to enable the integration an validation of the test logic in all phases of the design, and backend implementation flow.
• The job requires the candidate to have good scripting skills and the ability to design and debug with minimal oversight.
• Involve in high quality pattern release to test team and support silicon bring-up and yield improvement.

Requirements:

ASIC Design DFT engineer with 7+ years of related work experience with a broad mix of technologies including:

• Knowledge of the latest state of the art trends in Memory testing and silicon engineering
• Hands on experience in JTAG & IJTAG protocols, MBIST and scan architectures.
<...