This role serves as a core technical leader responsible for end‑to‑end defect engineering—from advanced SiC defect reduction and AI‑based inspection operations to SPC‑driven yield and reliability improvement—bridging UPS, Defect Management, and Fab organizations from technology development through mass production.

**Key Responsibilities & Scope**

(1) SiC Technology Advancement and New Defect Mode Improvement

+ Defect density reduction activities for various onsemi SiC products, includingSiC MOSFETs, Super Junction structures, multi‑epitaxial growth, and Trench Gate devices
+ Root cause analysis and improvement activities for surface defects, trench‑inside defects, sub‑CD micro defects, and Killer / Slow Killer defects

(2) ADC & Klarity Operation and Production / VOG Management

+ Production operation of AI‑based Defect Classification (ADC) systems
+ ADC retraining, critical step monitoring, and troubleshooting
+ Defect management for...