Job Description
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Our client is expanding their hardware engineering team and is looking for experienced engineers with a strong background in memory subsystem design. This role focuses on developing and integrating high performance memory solutions within advanced processor environments.
You will work closely with architecture, RTL and verification teams to design efficient and scalable memory subsystems, contributing to complex chip development projects.
Location : Barcelona, Spain - Hybrid
Responsibilities:
As a
Senior / Lead DDR Engineer, your broad responsibilities will include but are not limited to:
Senior DDR Engineer
Design and develop memory subsystems, including DDR or HBM based solutions
Implement and integrate memory controllers within SoC or ASIC environments