Job Description1. Responsible for D2D (Die-To-Die) & UCIe PHY IP hardware validation and software development.
2. Lead related IP development, familiar with software/SDK, issue debugging, optimization and testing in ASIC projects.
3. Collaborate with the team for functional/system bring-up, validation, performance optimization and adjustment.
4. Achieve product design-in import and support product mass production.Requirement1. MS degree in EE/CE/CSIE/ME/IS/ECE/ACE
2. Better with 3 years of working experience, especially in D2D (Die-To-Die) & UCIe physical layer and ASIC products.
3. Familiar with high-level proficiency in Python, C, C++ and MATLAB
4. Ability to analyze and measure PLL signals, and be especially familiar with D2D physical layer validation methods.
5. Self-motivated, good communication, and good teamwork.
6. Fluency in English speaking and reading skills