This is a hybrid role with four days per week at Cisco’s Yerevan office.

**Meet the Team**

Our team specializes in macro-level RTL-to-GDSII physical implementation and signoff, collaborating closely with Front-End teams to ensure optimal results. We are dedicated to delivering complex SoC and block-level projects through technical excellence and teamwork. The team is composed of highly experienced professionals who value collaboration and high standards in physical design.

**Your Impact**

Lead macro-level RTL-to-GDSII physical implementation and signoff. Collaborate with Front-End teams to translate architecture into optimal physical design. Perform synthesis, floorplanning, placement, Clock Tree Synthesis (CTS), and routing. Optimize power, performance, and area (PPA) while maintaining design correctness through formal verification. Execute static timing analysis (STA), physical verification, formal checks, and signoff closure to ensure reliable, hi...