ASIC Design Verification Engineer, Platforms and Devices

_corporate_fare_ Google _place_ Mountain View, CA, USA

**Mid**

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 4 years of experience verifying digital logic at RTL level using SystemVerilog or C/C++.
+ Experience creating and using verification components and environments in standard verification methodology (e.g., UVM, SVA, CRV, PSS or LPDV).
+ Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
+ Experience with scripting languages and software development frameworks.

**Preferred qualifications:**

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